Multi-channel memory architecture

In the fields of digital electronics and computer hardware, multi-channel memory architecture is a technology that increases the data transfer rate between the DRAM memory and the memory controller by adding more channels of communication between them. Theoretically, this multiplies the data rate by exactly the number of channels present. Dual-channel memory employs two channels. The technique goes back as far as the 1960s having been used in IBM System/360 Model 91 and in CDC 6600.[1]

Modern high-end desktop and workstation processors such as the AMD Ryzen Threadripper series and the Intel Core i9 Extreme Edition lineup support quad-channel memory. Server processors from the AMD Epyc series and the Intel Xeon platforms give support to memory bandwidth starting from quad-channel module layout to up to 12-channel layout.[2] In March 2010, AMD released Socket G34 and Magny-Cours Opteron 6100 series[3] processors with support for quad-channel memory. In 2006, Intel released chipsets that support quad-channel memory for its LGA771 platform[4] and later in 2011 for its LGA2011 platform.[5] Microcomputer chipsets with even more channels were designed; for example, the chipset in the AlphaStation 600 (1995) supports eight-channel memory, but the backplane of the machine limited operation to four channels.[6]

  1. ^ Jacob, Bruce; Ng, Spencer; Wang, David (2007). Memory systems: cache, DRAM, disk. Morgan Kaufmann. p. 318. ISBN 978-0-12-379751-3.
  2. ^ Shilov, Anton. "AMD Confirms Twelve DDR5 Memory Channels For Zen 4 EPYC CPUs". Tom's Hardware. Future US Inc. Retrieved 22 April 2024.
  3. ^ "Opteron 6000 Series Platform Quick Reference Guide" (PDF). AMD. Archived from the original (PDF) on 2012-05-12. Retrieved 2012-10-15.
  4. ^ 5000P memory controller, Intel.
  5. ^ Intel LGA2011 socket x68 express chipset pictured, Tech power up.
  6. ^ John H. Zurawski; John E. Murray; Paul J. Lemmon, "The Design and Verification of the AlphaStation 600 5-series Workstation", HP, 7 (1), archived from the original on 2021-02-25, retrieved 2011-10-19.

Multi-channel memory architecture

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